What is the CIRC file format?
A .circ file is a Logisim Circuit file, an XML-based description of a digital logic circuit used by the Logisim circuit simulator. Logisim was originally developed by Carl Burch around 2001 as an educational tool for designing and simulating combinational and sequential logic. After Burch retired the project in 2014, the community fork Logisim-evolution became the recommended successor, actively maintained by EPFL and open-source contributors.
A .circ file is plain XML rooted at <project source="version">, containing one or more <circuit> elements. Each circuit holds <wire> elements (defined by pixel-grid coordinates), <comp> elements representing logic gates, flip-flops, pins, and other components with attribute settings, and optionally <vhdl-entity> blocks for HDL-backed components. The source attribute in <project> records the Logisim or Logisim-evolution version that created the file. Files produced by Logisim-evolution are not backward-compatible with the original Logisim 2.x.
Logisim-evolution extends the format with chronogram (timing diagram) analysis, FPGA export targeting Xilinx, Altera, and Lattice boards, VHDL and Verilog co-simulation, multi-bit bus wiring, and expanded gate libraries. .circ files are widely used in undergraduate CS and EE courses (UC Berkeley CS 61C, MIT, ETH Zurich). The format is human-readable XML and can be opened in any text editor, though meaningful editing requires the Logisim-evolution graphical interface.
Security & safety
RISK: LOWA .circ file is a plain XML text file - it cannot execute code. Logisim-evolution does support VHDL synthesis and FPGA programming which interact with external toolchains, but the .circ file itself is passive. No known malware vector.
Format details
in a nutshellPrograms that open CIRC files
Technical details
deep spec| Encoding | Text, UTF-8 XML |
| Container | Plain XML |
| Root element | <project source="version"> with nested <circuit> elements |
| Typical file size | 1 KB - 500 KB (simple circuits 5-50 KB; large projects up to several MB) |
| Version tracking | source attribute in <project> records the creating Logisim/Logisim-evolution version |
| Component element | <comp lib="..." loc="..." name="..."> with nested <a> attribute children |
| Wire element | <wire from="(x,y)" to="(x,y)"> - pixel-coordinate grid layout |
| HDL support | <vhdl-entity> blocks for VHDL co-simulation in Logisim-evolution |
| Backward compatibility | Logisim-evolution files are not compatible with original Logisim 2.x |
| MIME type | application/xml (no dedicated MIME type registered) |
| FPGA export | Logisim-evolution supports Xilinx, Altera, and Lattice board targets from .circ files |
| Released | ~2001 (Logisim by Carl Burch) |
| Latest version | Logisim-evolution 3.9.x (actively maintained as of 2024-2025) |
| Specification | github.com |
CIRC conversions
Community Q&A
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